The present invention relates to manufacturing methods for semiconductor devices and in particular to a technology effectively applicable to a manufacturing method for plastic molded semiconductor package-type semiconductor devices.
Various types of semiconductor packages are used and among them there is a plastic molded semiconductor package in which a semiconductor chip is sealed with an encapsulation resin portion. In plastic molded semiconductor packages, a semiconductor chip is sealed in an encapsulation resin portion; therefore, the reliability of the semiconductor chip can be enhanced. When a terminal is exposed in the back surface of the encapsulation resin portion, the plastic molded semiconductor package can be surface mounted.
Japanese Unexamined Patent Publication No. 2003-188341 (Patent Document 1) describes a technology for implementing the following: a first lead frame and a second lead frame are set in the vertical direction; a first semiconductor chip and a second semiconductor chip are placed over the respective lead frames; and these semiconductor chips are respectively sealed with first encapsulation resin and second encapsulation resin.
Japanese Unexamined Patent Publication No. Sho 61 (1986)-117858 (Patent Document 2) describes a technology related to a semiconductor device in which multiple semiconductor chips are provided in one and the same package in a stacked manner.
[Patent Document 1]
    Japanese Unexamined Patent Publication No. 2003-188341[Patent Document 2]    Japanese Unexamined Patent Publication No. Sho 61 (1986)-117858